https://enjoy-digital.github.io/tags/usb3/Recent content in Usb3 on LiteX NotesHugo -- gohugo.ioenBuilt with Hugo. Content BSD-2-Clause, like LiteX.Fri, 30 Oct 2026 13:30:00 +0100https://enjoy-digital.github.io/posts/usb3-pipe-gowin/Fri, 30 Oct 2026 13:30:00 +0100https://enjoy-digital.github.io/posts/usb3-pipe-gowin/Porting USB3-PIPE to Gowin GW5A FPGAs: why the Artix7/UltraScale+ fabrics and Vivado made the first two steps easier, what we had to cut and restructure to close timing on Gowin, the synthesis and place-and-route issues we hit, the 5Gbps results on the Tang Mega 138K Pro, and the open USB 3 gateware for the SLogic16U3.https://enjoy-digital.github.io/posts/usb3-pipe-gen2/Fri, 30 Oct 2026 13:15:00 +0100https://enjoy-digital.github.io/posts/usb3-pipe-gen2/How USB3-PIPE got from 5Gbps to 10Gbps: what USB 3.2 Gen 2 changes, why we built it in simulation before touching hardware, the four bring-up milestones on an Alibaba Cloud XCKU3P card, what only the hardware could show, and the measured throughput.https://enjoy-digital.github.io/posts/usb3-pipe/Fri, 30 Oct 2026 13:00:00 +0100https://enjoy-digital.github.io/posts/usb3-pipe/How USB3-PIPE went from a 2019 link-training experiment to a complete USB 3 SuperSpeed device stack in the FPGA fabric: why it stalled, what following the spec really involves, how the work restarted, the hardware issues found on the Acorn’s Artix7 GTP, and the measured results.