https://enjoy-digital.github.io/tags/litex/Recent content in Litex on LiteX NotesHugo -- gohugo.ioenBuilt with Hugo. Content BSD-2-Clause, like LiteX.Tue, 02 Jun 2026 12:00:00 +0200https://enjoy-digital.github.io/posts/colorlite/Tue, 02 Jun 2026 12:00:00 +0200https://enjoy-digital.github.io/posts/colorlite/A $15 ColorLight ECP5 board, a LiteX SoC with Ethernet, and a cheap relay module: remote power-on/off for an office PC during COVID, built with the fully open-source Yosys/NextPnr toolchain. With a note on reversing boards from the FPGA side.https://enjoy-digital.github.io/posts/mquickjs-on-litex/Tue, 02 Jun 2026 11:00:00 +0200https://enjoy-digital.github.io/posts/mquickjs-on-litex/JavaScript running bare-metal on a RISC-V softcore inside a LiteX SoC, with framebuffer demos and a live browser editor served straight from the FPGA. No host, no transpilation.https://enjoy-digital.github.io/posts/ai-era-fpga/Tue, 02 Jun 2026 09:00:00 +0200https://enjoy-digital.github.io/posts/ai-era-fpga/LiteX was always command-line and text first, for cost reasons. It turns out that’s exactly what an AI agent needs to drive an FPGA. Here’s the methodology we use now, with LiteNVMe and M2SDR as real examples.https://enjoy-digital.github.io/posts/qemu-litex-cosim/Tue, 02 Jun 2026 00:00:00 +0000https://enjoy-digital.github.io/posts/qemu-litex-cosim/PR #2468 lets LiteX run the CPU in QEMU while Verilator keeps simulating the SoC. Here’s how it works, a first benchmark, and a real rv64 Linux boot.