The Elgato Cam Link 4K, from a 2019 LiteX board that booted Linux as a DRAM test to a complete open capture card: what the design does, how ECP5 DDR3 got twice the bandwidth in LiteDRAM, why it has lower latency than the stock firmware, and what changed between the two attempts.
The full story of LiteSATA’s ECP5 PHY: four years parked on issue #27, one weekend of AI bring-up to first link-up, one very silly bench bug, and three merged PRs. What AI-assisted FPGA engineering looks like when it works, effort included.
A $15 ColorLight ECP5 board, a LiteX SoC with Ethernet, and a cheap relay module: remote power-on/off for an office PC during COVID, built with the fully open-source Yosys/NextPnr toolchain. With a note on reversing boards from the FPGA side.
