Posts

Everything I’ve written so far, newest first.

2026

ColorLite: remote power control on a $15 FPGA board

2 June 2026·1471 words·7 mins

Demos Litex Fpga Ecp5 Colorlight Liteeth Yosys Nextpnr Reverse-Engineering

A $15 ColorLight ECP5 board, a LiteX SoC with Ethernet, and a cheap relay module: remote power-on/off for an office PC during COVID, built with the fully open-source Yosys/NextPnr toolchain. With a note on reversing boards from the FPGA side.

mquickjs on LiteX: JavaScript on an FPGA softcore

2 June 2026·1136 words·6 mins

Demos Litex Javascript Quickjs Fpga Vexriscv Framebuffer Demoscene

JavaScript running bare-metal on a RISC-V softcore inside a LiteX SoC, with framebuffer demos and a live browser editor served straight from the FPGA. No host, no transpilation.

FPGA development with LiteX in the AI era

2 June 2026·2320 words·11 mins

Methodology Litex Ai Agents Fpga Litescope Nvme Sdr Methodology

LiteX was always command-line and text first, for cost reasons. It turns out that’s exactly what an AI agent needs to drive an FPGA. Here’s the methodology we use now, with LiteNVMe and M2SDR as real examples.

QEMU co-simulation in LiteX

2 June 2026·2424 words·12 mins

Simulation Litex Simulation Qemu Riscv Fpga Verilator Linux

PR #2468 lets LiteX run the CPU in QEMU while Verilator keeps simulating the SoC. Here’s how it works, a first benchmark, and a real rv64 Linux boot.

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