<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>LiteX Notes</title><link>https://enjoy-digital.github.io/</link><description>Recent content on LiteX Notes</description><generator>Hugo -- gohugo.io</generator><language>en</language><copyright>Built with Hugo. Content BSD-2-Clause, like LiteX.</copyright><lastBuildDate>Tue, 02 Jun 2026 12:00:00 +0200</lastBuildDate><atom:link href="https://enjoy-digital.github.io/index.xml" rel="self" type="application/rss+xml"/><item><title>ColorLite: remote power control on a $15 FPGA board</title><link>https://enjoy-digital.github.io/posts/colorlite/</link><pubDate>Tue, 02 Jun 2026 12:00:00 +0200</pubDate><guid>https://enjoy-digital.github.io/posts/colorlite/</guid><description>A $15 ColorLight ECP5 board, a LiteX SoC with Ethernet, and a cheap relay module: remote power-on/off for an office PC during COVID, built with the fully open-source Yosys/NextPnr toolchain. With a note on reversing boards from the FPGA side.</description><media:content xmlns:media="http://search.yahoo.com/mrss/" url="https://enjoy-digital.github.io/posts/colorlite/featured.png"/></item><item><title>mquickjs on LiteX: JavaScript on an FPGA softcore</title><link>https://enjoy-digital.github.io/posts/mquickjs-on-litex/</link><pubDate>Tue, 02 Jun 2026 11:00:00 +0200</pubDate><guid>https://enjoy-digital.github.io/posts/mquickjs-on-litex/</guid><description>JavaScript running bare-metal on a RISC-V softcore inside a LiteX SoC, with framebuffer demos and a live browser editor served straight from the FPGA. No host, no transpilation.</description><media:content xmlns:media="http://search.yahoo.com/mrss/" url="https://enjoy-digital.github.io/posts/mquickjs-on-litex/featured.png"/></item><item><title>FPGA development with LiteX in the AI era</title><link>https://enjoy-digital.github.io/posts/ai-era-fpga/</link><pubDate>Tue, 02 Jun 2026 09:00:00 +0200</pubDate><guid>https://enjoy-digital.github.io/posts/ai-era-fpga/</guid><description>LiteX was always command-line and text first, for cost reasons. It turns out that&amp;rsquo;s exactly what an AI agent needs to drive an FPGA. Here&amp;rsquo;s the methodology we use now, with LiteNVMe and M2SDR as real examples.</description><media:content xmlns:media="http://search.yahoo.com/mrss/" url="https://enjoy-digital.github.io/posts/ai-era-fpga/featured.png"/></item><item><title>QEMU co-simulation in LiteX</title><link>https://enjoy-digital.github.io/posts/qemu-litex-cosim/</link><pubDate>Tue, 02 Jun 2026 00:00:00 +0000</pubDate><guid>https://enjoy-digital.github.io/posts/qemu-litex-cosim/</guid><description>PR #2468 lets LiteX run the CPU in QEMU while Verilator keeps simulating the SoC. Here&amp;rsquo;s how it works, a first benchmark, and a real rv64 Linux boot.</description><media:content xmlns:media="http://search.yahoo.com/mrss/" url="https://enjoy-digital.github.io/posts/qemu-litex-cosim/featured.png"/></item><item><title>About</title><link>https://enjoy-digital.github.io/about/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://enjoy-digital.github.io/about/</guid><description>&lt;p&gt;Hi, I&amp;rsquo;m &lt;strong&gt;Florent Kermarrec&lt;/strong&gt;. I started &lt;a href="https://github.com/enjoy-digital/litex" target="_blank" rel="noreferrer"&gt;LiteX&lt;/a&gt; and
I&amp;rsquo;m its main developer at &lt;a href="https://github.com/enjoy-digital" target="_blank" rel="noreferrer"&gt;enjoy-digital&lt;/a&gt;, though by now
it&amp;rsquo;s very much a community project, with a lot of people contributing cores, ports and fixes.&lt;/p&gt;</description></item></channel></rss>